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[VHDL-FPGA-Verilog] fenbushisuanfa

Description: 分布式算法在20多年前被首次提出，但直到Xilinx发明FPGA的查找表结构以后，分布式算法才在20世纪90年代初重新受到重视，并被有效地应用在FIR滤波器的设计中。 分布式算法是基于查找表的一种计算方法，在利用FPGA实现数字信号处理方面发挥着重要的作用，可以大大提高信号的处理效率。它主要应用于数字滤波、频率转换等数字信号处理的乘累加运算。 -see up
Platform: | Size: 112640 | Author: 张锴 | Hits:

[Embeded-SCM Develop] Xilin

Description: Xilinx时序约束培训教材,主要介绍FPGA的时序约束。-Xilinx
Platform: | Size: 1258496 | Author: nick | Hits:

[Other] ise_book

Description: 关于xilinx的FPGA的EDK的程序（教程），使用ise集成环境-On the FPGA of the EDK program (tutorial), using ise integration environment
Platform: | Size: 8398848 | Author: 周一一 | Hits:

[Other] picieee.tar

Description: The Synthetic PIC is a synthesizable VHDL description of the basic Microchip PIC 16C5X microcontroller. It is written in the ViewLogic VHDL environment (Workview PLUS 5.2). It has successfully been synthesized to the XC4000 family, although it is not particular to XILINX. The intent of the model is to provide a starting point for using the PIC architecture as a "core" for an FPGA, ASIC, etc. This model does not attempt to emulate the PIC with absolute fidelity, rather, it is a good starting point for spinning your own core. -The Synthetic PIC is a synthesizable VHDL description of the basic Microchip PIC 16C5X microcontroller. It is written in the ViewLogic VHDL environment (Workview PLUS 5.2). It has successfully been synthesized to the XC4000 family, although it is not particular to XILINX. The intent of the model is to provide a starting point for using the PIC architecture as a "core" for an FPGA, ASIC, etc. This model does not attempt to emulate the PIC with absolute fidelity, rather, it is a good starting point for spinning your own core.
Platform: | Size: 10240 | Author: hfayed | Hits:

[Com Port] high_speed_data_recovery

Description: 1. 程序的功能是:高速串行数据的恢复. 2. 其基本原理是：利用过采样，检测串行数据的边沿跳变，然后根据边沿提取处在数据相位正中央相邻的抽样值，将串行数据恢复过来。 3. 此程序是verilog 语言编写，用于xilinx virtexE 系列的FPGA-1. Program functions are: high-speed serial data recovery. 2. The basic principle is: the use of over-sampling to detect the edge of serial data transitions, and then at the edge of the data extraction phase of the center adjacent to the sampling value, the serial data to recover. 3. This program is written in verilog for xilinx virtexE series of FPGA
Platform: | Size: 1024 | Author: wanglin | Hits:

[matlab] Rocket

Description: 很好的高速口的设计资料，很好的高速口的设计资料 很好的高速口的设计资料-In design of large-scale access convergence router(hereafter referred to ACR) forwarding engine, the Xilinx Virtex-4 FPGA!s RocketI/O r multi-gigabit transceiver is used to satisfy the need of high speed and steady interface between forwarding engine and switch fabric. This pape proposes an assistant channel bonding method for solving the difficult problem of channels-bonding synchronization. Experimental results show the
Platform: | Size: 272384 | Author: guoguo | Hits:

[VHDL-FPGA-Verilog] spartan-3E

Description: xilinx公司的FPGA的spartan-3E系列套片参数手册-xilinx the company' s FPGA-spartan-3E series of set piece argument Handbook
Platform: | Size: 2729984 | Author: symbolics | Hits:

[VHDL-FPGA-Verilog] sumador

Description: sumer vhdl code for FPGA of Xilinx
Platform: | Size: 1024 | Author: Lowis | Hits:

[Software Engineering] DesignofFloatingPointCalculatorBasedonFPGA

Description: 给出系统的整体框架设计和各模块的实现，包括芯片的选择、各模块之间的时序以及控制、每个运算模块详细的工作原理和算法设计流程；通过VHDL语言编程来实现浮点数的加减、乘除和开方等基本运算功能；在Xilinx ISE环境下，对系统的主要模块进行开发设计及功能仿真，验证 了基于FPGA的浮点运算。 -The overall framework of system design and realization of each module which contain selection of chip，timing and control between modules，detailed principle and design process of algorithm for each module were all described；The basic calculating functions of floating-point numbers，such as addition, subtraction，multiplication，division and extraction were implemented with VHDL. In the circumstance of Xilinx ISE，the development and functional simulation for main modules of system were accomplished，and then floating point calculation based on FPGA Was confirmed
Platform: | Size: 3488768 | Author: mabeibei | Hits:

[VHDL-FPGA-Verilog] deinterleave

Description: CDMA.1X中，解交织的FPGA实现，程序基于VHDL编写，在XILINX开发板实现。-CDMA.1X, the solution of interwoven FPGA implementation, the program prepared based on VHDL, in the XILINX development board to achieve.
Platform: | Size: 268288 | Author: 蔡蔡 | Hits:

[File Format] FPGA_advanced_techniques_designs_for_Xilinx

Description: FPGA设计高级技巧Xilinx篇,针对Xilinx软件和工具的FPGA设计技巧，对深入理解FPGA设计有一定的作用。-FPGA designs Xilinx advanced techniques articles, tools for the Xilinx software and FPGA design skills, in-depth understanding of FPGA design of a certain role.
Platform: | Size: 1705984 | Author: 田涛 | Hits:

[Other] couter

Description: 这是一个基于Xilinx Spartan3e开发板的非常简单的一个源代码，对于初学者可以用来熟悉Fpga的开发流程用。-This is a very simple code based on xinlinx Spartan3e board,it s very useful for beginner to study FPGA.
Platform: | Size: 367616 | Author: liuyang | Hits:

[VHDL-FPGA-Verilog] SpWIF

Description: spacewire 总线收发接口源代码，VHDL，适用于Xilinx，测试FPGA：XC3S1000FTG256-4C-spacewire bus transceiver interface, the source code, VHDL, applicable to Xilinx, testing FPGA: XC3S1000FTG256-4C
Platform: | Size: 20480 | Author: young | Hits:

[Software Engineering] Sum

Description: FPGA with VHDL sum example in Xilinx
Platform: | Size: 1024 | Author: uyeuye | Hits:

[VHDL-FPGA-Verilog] mult

Description: 乘法器的的FPGA实现，内附Xilinx的ISE软件下的工程及仿真！-Multiplier of the FPGA, Xilinx' s ISE software included under the engineering and simulation!
Platform: | Size: 89088 | Author: rbj | Hits:

[VHDL-FPGA-Verilog] fpga_high

Description: FPGA的提高教学，介绍了ALTERA和XILINX的FPGA的详细应用-FPGA to improve teaching, describes the FPGA ALTERA and XILINX detailed application
Platform: | Size: 735232 | Author: wait | Hits:

[Other] XilinxFPGA

Description: 介绍如何使用xilinx编译FPGA的方法-introduction of how to compile FPGA using xilinx.
Platform: | Size: 1735680 | Author: mike | Hits:

[VHDL-FPGA-Verilog] aips7108.tar

Description: SATA 仿真模型 SATA 仿真模型-Simulation Model SATA SATA SATA simulation model simulation model
Platform: | Size: 17650688 | Author: 罗宇平 | Hits:

[Software Engineering] xapp1014

Description: Xilinx 音视频设计文档，包括参考设计说明，适合FPGA工程师参考-Xapp1014- Advanced FPGA Design- audio video connectivity.pdf
Platform: | Size: 5657600 | Author: zhangxinxin | Hits:

[Software Engineering] GeneratingFPGA-AcceleratedDFTLibraries

Description: 关于DFT的文章，应用FPGA实现傅立叶变换。-Abstract—We present a domain-specific approach to generate high-performance hardware-software partitioned implementations of the discrete Fourier transform (DFT). The partitioning strategy is a heuristic based on the DFT’s divide-and-conquer algorithmic structure and fine tuned by the feedback-driven exploration of candidate designs. We have integrated this approach in the Spiral linear-transform code-generation framework to support push-button automatic implementation. We present evaluations of hardware-software DFT implementations running on the embedded PowerPC processor and the reconfigurable fabric of the Xilinx Virtex-II Pro FPGA. In our experiments, the 1D and 2D DFT’s FPGA-accelerated libraries exhibit between 2 and 7.5 times higher performance (operations per second) and up to 2.5 times better energy efficiency (operations per Joule) than the software-only version.
Platform: | Size: 235520 | Author: 李然 | Hits:
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